RELEASE NOTES ============= Product : GNU C/C++ Compiler Toolkit for ARC Processors MileStone : First release with C++ support, DFA description of ARC700 pipeline and SIMD instruction support in binutils Version : GNU binutils 2.15 codito-20060222-release GCC 3.4.5 codito 20060222 (with ARC700 DFA pipeline description + c++ support) [ derived from FSF release on 30th Nov 2005] Date : February 22 2006 Table of Contents ----------------- 1. Overview 2. Features Supported 3. Major changes in this release 4. Known Limitations and Defects 5. Contact Information 6. Reference 1. Overview ------------ This is the first open release of the C++ compiler for ARC. The release also includes improved scheduling support for ARC700, using the DFA based pipeline hazard recognizer and instruction scheduler. The binutils release herewith, supports the Aurora SIMD extensions to the ARC700 ISA. 2. Features Supported ---------------------- 2.1 Features of optimizations release #1 (February 22 2006) ----------------------------------------------------------- * A crosstool based build mechanism for arc-linux-uclibc target. * DFA description of ARC700 pipeline behaviour for improved scheduling of instructions, in the compiler. * C++ language support in the compiler. * Support for Aurora SIMD extension instructions in binutils. * Support for -mlong-calls switch. * Support for 'long_call' and 'short_call' function attributes. * Char variables now default to 'unsigned char' as against 'signed char' earlier. * Dummy -msoft-float flag support in the compiler. * Support for sibling call optimizations. * Support for conditional branch pseudo-mnemonics BRGT , BRLE, BRHI, BRLS, BRCS. * Improved error reporting by the linker (in case of relocation overflows). * Improved 16-bit code generation in function pro/epilogues. * Fixes to eliminate redundant code generation (unnecessary moves eliminated). * Filling up the gaps in text section due to alignment, with nops instead of 0x00. * GCC upgraded to version 3.4.5 * Miscellaneous other bug fixes. 2.2 Features of support release #1 (July 25 2005) ------------------------------------------------- * Handling of extension instructions in the binutils rewritten. * New flags added to the compiler and binutils (See section 3 below). * Bug #1366 in the generation of min instructions fixed. * Bug #1307 in the generation of multiple shifts for ARCtangent-A4 fixed. * Bug #1378 in the costs of multiply instructions fixed. * Bug #1310 with generation of bbit instructions fixed. * Bug #1301 with spurious add2 generation in A4 code fixed. * Bugs #1284, #1294 fixed, allowing brk generation with builtins for all cores. * Bug #1011 with bic instruction generation fixed. * Bug #1293 fixed, disallowing generation of divaw instruction generation and support for the same in binutils, for ARC700 base case. * Bug #1309 with the support for lsl instructions in the assembler fixed. * Miscellaneous code clean-ups. 2.3 Features of the first upgrade release (May 23 2005) ------------------------------------------------------- * Improved ABI compatibility * Support for extension instructions for ARCtangent-A5, ARC600 and ARC700 processors * Support for builtins (compiler intrinsics) as an interface for generating assembly instructions. * Better support for DWARF-2 debug information generation. * newlib is now built for big-endian targets as well. * Numerous bug-fixes and cleanups. 3. Major back-end changes in this release ----------------------------------------- * A DFA based pipeline description of the ARC700 cores, facilitates improved instruction scheduling for the same. All the major pipeline characteristics of instructions generated by the compiler have been incorporated in the back-end. * Language support for C++ has been added. * The 'char' datatype now defaults to 'unsigned char' as against 'signed char' till the previous release. This makes this release binary incompatible with the previous releases of the toolchain. * A new command-line switch '-mlong-calls' has been added to force calls as register-indirect jump-and-link instructions has been added. To override the command-line switch, new function attributes 'long_call' and 'short_call' have also been added. More details are provided in the GNU Tools User Guide released herewith. * A dummy -msoft-float flag has been added to ease building of applications, which use this flag generically for all architectures. For the list of changes in the earlier releases, please see the corresponding release notes. 4. Known Limitations and Defects -------------------------------- * Position Independent Code generation support is only available for the ARC700 processor. * The description for the DFA based pipeline hazard recognizer and instruction scheduler is present only for ARC700, so the compiler still uses the old instruction scheduler for older architecture variants. * Some applications are known to fail, if the -lpthread flag is passed at link-time in the build. 5. Contact Information ---------------------- In case of any defects please contact arc-support@codito.com. If you have a support contract, please use the support site at http://support.codito.com. 6. References ------------- * ARC700 ISA Reference Manual * ARC GNU Tools User Guide * Sys V ABI Extension for ELF for the ARC * Aurora SIMD extensions to the ARC700 ISA. * The finite state automaton based pipeline hazard recognizer and instruction scheduler in GCC - by Vladimir N. Makarov (GCC Summit 2003 proceedings) [Link: http://www.gccsummit.org/2003 ] Tools Team Codito Technologies